A
Q a) Convert the decimals 17.125 and –23 into their binary equivalents (use the 2’s b) Convert the binary 1011011011011 into the Hexadecimal and Octal equivalents. ) What are the decimal equivalents of the binary 10011011 (considered to be given uestion 2
complement representation).
in one of the three representations: signed magnitude, 1’s complement and 2’s complement).
c
Q ) Show how to implement NOT, AND and OR using only NAND gates.
a
b) The logical statement for an XNOR gate can be written as: tement? How would you R Question 3
P=1 only if either A=0 and B=0 or if A=1 and B=1.
What is the equivalent Boolean expression for this sta
construct a circuit that performs the XNOR using INVERTERs and AND and Ogates? a) Draw a truth table for the circuit in figure 1, obtain the Boolean expression for the
output P1 and determine the equivalent single gate implementation. 12A
Figure 1. b) Show using Boolean algebra and the Karnaugh map that the simplest expression
for ABCDDCABBCDADBCADCBADCBAP+++++=2 is BDBAP+=2
simplification.
) Compare the number of gates needed to implement P2 before and after d) Implement the circuit (simplest version) of P2 using only NAND gates. uestion 4
c
Q a chemical process, you are asked to design a logic circuit (?) that drives an alarm
In
buzzer. The circuit has three inputs (A=temperature, B=pressure, C=Supply of a raw material) and an output Q (figure 2).
Figure 2.
The buzzer sounds (Q=1) if the temperature rises above a specified level (A=1) or the pressure rises above a specified level (B=1) or the supply of the raw material is below a certain level (C=0).
a) Write down the truth table and a Boolean expression for the output Q of the circuit using the POS (product of sums) form.
b) Write the Boolean expression of Q using the SOP (sum of products) form. Simplify it using a Karnaugh map to show that is equivalent to the POS form.
c) Implement the circuit (?) using basic gates (OR, INVERTER, AND).
Question 5
Give the truth table of JK flip-flop.
What is edge triggering?
Given the inputs of a negative edge triggered JK flip-flop, obtain the output (Q) waveform (initially RESET).
Q
Give an example of an active low S-R latch circuit using NAND gates
Why the state Sis invalid?
